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USB3_HT3是一个基于Texas Instrument TUSB1310的子板，它是在系列中提供的一个单端口USB 3.0 Type-B连接器财神棋牌_财神棋牌app下载。一个超高速USB 3.0类型A (F)到类型B (M)适配器，包括主机模式。子板为usb2.0操作提供了ULPI (UTMI + Low Pin)接口财神棋牌_财神棋牌app下载，为usb3.0操作提供了PIPE接口。详细 >>

SYNOPSYS

SOCIO_HT3子板包括两个微型USB接口，通过一个标准的USB电缆提供RS-232连接，为20-pin的ARM Cortex Debug接口提供连接，以及38-pin的MICTOR接口和28针的PMOD接口与GPIO接口财神棋牌_财神棋牌app下载。详细 >>

SYNOPSYS

SOC_SDNF_HT3子板包括两个微型USB连接器财神棋牌_财神棋牌app下载，通过标准USB电缆提供RS-232连接，连接20-pin ARM Cortex Debug接口和12-pin PMOD GPIO接口。详细 >>

SYNOPSYS

SOC_NORF_HT3子板可通过HT3连接器连接NOR-Flash。详细 >>

SYNOPSYS

HAPS-SX VU440 1F

HAPS - SX VU440 1F 平台原型配置了一个Xilinx VU440 FPGA 详细 >>

SYNOPSYS

HAPS-SX VU440 4F

HAPS - SX VU440 4F是一个独立的系统，搭载四个Xilinx?VU440 FPGA，支持广泛的设计类型财神棋牌_财神棋牌app下载。该系统可以由一个4车道的PCIe?接口(Gen3)财神棋牌_财神棋牌app下载、USB和以太网承载。HAPS - SX VU440一块板上拥有多达1.04亿个ASIC逻辑门。丰富的固定互连路由使用LVDS形式，速度可达1.4 Gb/s。收发器主总线的运行速度为10Gb/s, 以及其4条通道的运行速度为5GB/s财神棋牌_财神棋牌app下载。详细 >>

SYNOPSYS

如今，无线、汽车和工业产品，需要多处理器的SoC和复杂的软件组合来应对针对其目标市场的功能、能力和性能上的要求财神棋牌_财神棋牌app下载。SoC硬件和软件之间的相互依赖性需要一种设计方法和开发团队的设置，使硬件和软件能够相互开发财神棋牌_财神棋牌app下载。因此，原型设计已经成为技术公司整体硬件验证、软件开发和系统验证策略的一个关键方法财神棋牌_财神棋牌app下载。详细 >>

SYNOPSYS

FMC_FIREFLY_HT3

FMC_FIREFLY_HT3子板包括三个FireFly收发器连接器财神棋牌_财神棋牌app下载，通过三个FireFly电缆支持多达10个高速串行链路。FMC连接器通过四个HT3连接器提供一个标准的夹层卡形式因子财神棋牌_财神棋牌app下载、连接器和?？榻涌诓粕衿迮芲财神棋牌app下载，以连接到HAPS系统财神棋牌_财神棋牌app下载。详细 >>

SYNOPSYS

双FireFly收发卡(FIREFLY_MGB)包括两个堆叠的FireFly收发连接器，它们通过两条FireFly电缆支持最多8条高速串行链路，可以调整到每个链路高达12.5Gbps，每个连接器插座有4条链路。详细 >>

SYNOPSYS

FusionServer机架服务器FusionServer 2288H V5

华为FusionServer 2288H V5是一款2U2路机架服务器，配置灵活，可广泛适用于云计算虚拟化财神棋牌_财神棋牌app下载、数据库、大数据等负载财神棋牌_财神棋牌app下载。2288H V5可配置2路英特尔? 至强? 可扩展处理器、24条DDR4内存扩展插槽与10个PCIe扩展槽及最多20*3.5”或31*2.5”的本地存储资源（可配置4/8/12/24/28个NVMe SSD硬盘）财神棋牌_财神棋牌app下载。集成DEMT智能功耗管理、FDM智能故障管理等专利技术，可选配华为eSight全生命周期管理软件，能够有效降低运营成本财神棋牌_财神棋牌app下载、提升投资回报财神棋牌_财神棋牌app下载。详细 >>

华为

FusionServer机架服务器FusionServer 2288 V5

华为FusionServer 2288 V5是一款2U2路机架服务器财神棋牌_财神棋牌app下载，配置灵活财神棋牌_财神棋牌app下载，可广泛适用于云计算虚拟化财神棋牌_财神棋牌app下载、数据库、大数据等负载。2288 V5可配置2路英特尔至强可扩展处理器、16条DDR4内存扩展插槽与8个PCIe扩展槽及最多16*3.5”或27*2.5”的本地存储资源。集成DEMT智能功耗管理、FDM智能故障管理等专利技术，可选配华为eSight全生命周期管理软件财神棋牌_财神棋牌app下载，能够有效降低运营成本财神棋牌_财神棋牌app下载、提升投资回报。详细 >>

华为

FusionServer机架服务器 FusionServer 1288H V5

华为FusionServer 1288H V5是一款1U2路机架服务器，适用于云计算虚拟化、高性能计算(HPC)、大数据处理等负载的高密度部署，提升数据中心空间利用率财神棋牌_财神棋牌app下载。1288H V5在1U空间里可配置2路英特尔? 至强? 可扩展处理器、24条DDR4内存（2666MT/s）及4*3.5”或10*2.5”的本地存储资源（可配置4/8个NVMe SSD硬盘）。集成DEMT智能功耗管理、FDM智能故障管理等专利技术，可选配华为eSight全生命周期管理软件，能够有效降低运营成本、提升投资回报。详细 >>

华为

数据中心异构服务器FusionServer G560 V5全宽异构计算节点

华为FusionServer G560 V5是全宽异构计算节点财神棋牌_财神棋牌app下载，具有高密的异构计算能力财神棋牌_财神棋牌app下载，支持GPUDirect RDMA和P2P，以及NVLink互联技术；支持一键切换异构拓扑财神棋牌_财神棋牌app下载，为多样化应用负载提供最优的异构拓扑配置财神棋牌_财神棋牌app下载；基于全?？榛杓?，支持CPU和异构部件的长期演进财神棋牌_财神棋牌app下载。FusionServer G560 V5适配AI训练、HPC财神棋牌_财神棋牌app下载、智能云和数据库等应用场景加速。详细 >>

华为

数据中心异构服务器FusionServer G530 V5半宽异构计算节点

华为FusionServer G530 V5是半宽异构计算节点，具有高密的异构计算能力，支持GPUDirect RDMA和P2P互联技术；支持多种CPU:GPU配比，为多样化应用负载提供最优的异构拓扑配置；基于全?？榛杓?，支持CPU和异构部件的长期演进。FusionServer G530 V5适配AI推理、HPC、智能云和数据库等应用场景加速。详细 >>

华为

数据中心异构服务器FusionServer G560全宽异构计算节点

华为FusionServer G560是全宽异构计算节点，具有高密的异构计算能力财神棋牌_财神棋牌app下载，支持GPUDirect RDMA和P2P互联技术；支持一键切换异构拓扑，为多样化应用负载提供最优的异构拓扑配置财神棋牌_财神棋牌app下载；基于全?？榛杓?，支持CPU和异构部件的长期演进财神棋牌_财神棋牌app下载。FusionServer G560适配AI训练、HPC、智能云和数据库等应用场景加速。详细 >>

华为

异构服务器FusionServer G5500数据中心异构服务器

华为FusionServer G5500是面向数据中心部署的异构服务器，具有高密的异构计算能力，支持GPUDirect RDMA和P2P，以及NVLink互联技术财神棋牌_财神棋牌app下载；支持一键切换异构拓扑，为多样化应用负载提供最优的异构拓扑配置；基于全?？榛杓?，支持CPU和异构部件的长期演进财神棋牌_财神棋牌app下载。FusionServer G5500是适配AI、HPC财神棋牌_财神棋牌app下载、智能云财神棋牌_财神棋牌app下载、视频分析和数据库加速等应用场景的最佳异构计算平台。详细 >>

华为

ARM服务器TaiShan 2280 ARM服务器

TaiShan 2280服务器是基于华为自研ARM处理器Hi1616的2U2路机架服务器，提供64核、2.4GHz主频的计算能力，支持PCIe3.0、10GE和SAS/SATA等接口。 TaiShan 2280服务器具有高性能财神棋牌_财神棋牌app下载、低功耗的特点，适合为大数据分析、分布式存储、云和ARM原生等应用场景的工作负载进行高效加速。 TaiShan 2280服务器实现计算、存储、网络和管理等核心芯片全自研，掌握完整知识产权，适合构建安全可靠计算平台，保障业务连续性和数据端到端安全。详细 >>

华为

通用服务器FusionServer 2488H V5

华为FusionServer 2488H V5是最新推出的2U4路机架服务器，适用于虚拟化、高性能计算(HPC)、数据库、SAP HANA等计算密集型场景，相比于2台传统2U2路机架服务器，在虚拟化应用场景中1台2488H V5可以带来约32%的OPEX节省*。2488H V5在2U空间内可配置4个英特尔? 至强? 可扩展处理，48条DDR4内存（2666MT/s），以及最多25*2.5”的本地存储资源（可配置8个NVMe SSD）财神棋牌_财神棋牌app下载。集成DEMT智能功耗管理、FDM智能故障管理等专利技术，可选配华为eSight全生命周期管理软件，能够有效降低运营成本、提升投资回报。详细 >>

华为

FPGA数?；旌峡诖笛槠教ā狤GO1

2016教育部Xilinx产学合作协同育人项目的数字电路课程改革成果，由上海交通大学电工电子教学实验中心定义课程大纲、实验内容、口袋平台规格。硬件平台由依元素科技订制完成，适用于学生自主学习和课程设计财神棋牌_财神棋牌app下载，是一款便携式的FPGA实验平台财神棋牌_财神棋牌app下载。同时也是Xilinx 大学计划在国内第一个支持的本土型大规?？纬谈母锵钅?财神棋牌_财神棋牌app下载。详细 >>

依元素科技

解决复杂工程问题为导向的系统能力培养方案、支持多门课程实践贯通的统一平台，适合各类院校采用的实验方案和丰富的课程资源财神棋牌_财神棋牌app下载。详细 >>

依元素科技

2GB or 4GB Hybrid Memory Cube (HMC) FMC Module (Vita57.4)

Vita 57 provides a mechanical standard for I/O mezzanine modules. This standard introduces a methodology that shall allow the front panel IO of IEEE 1101 form factor cards to be configured via mezzanine boards. Vita 57 modules have fixed locations for serial/parallel IOs, clocks, Jtag signals, VCC, and GND. This Vita57.4 compliant FMC+ module is supported by one or two Micron 2GB Hybrid Memory Cube (HMC) device(s) supporting density of up to 4GB. The module works only with FPGA carriers board supporting Vita57.4 ports (i.e. HTG-9100? , HTG-830?, HTG-828 , HTG-930, and HTG-847?). 详细 >>

HitechGlobal

ADM-PCIE-8K5采用功能强大且高效的Xilinx Virtex Ultrascale?KU115-2 FPGA，是一款半长度，超薄型PCI Express?附加卡。 AMD-PCIE-8K5具有两个独立的DDR4内存通道，每个通道容量为2400MT/s（标配16GB-可选32GB）财神棋牌_财神棋牌app下载，双SFP+机箱提供2个10GBE/16G光纤通信（Gen 5）功能财神棋牌_财神棋牌app下载。每个通道最高可达4x16Gbps的双Firefly连接器。电压/温度/电流控制和监测。电路板上配有用于开发系统的风冷式散热器和可选风扇，不会在PCIe插槽上产生足够的气流。在机架式服务器系统中财神棋牌_财神棋牌app下载，不需要风扇（被动冷却）。详细 >>

ALPHA DATA

PicoZed Embedded Vision Kit

PicoZed嵌入式视觉开发套件通过添加视频专用接口构建在PicoZed SOM上财神棋牌_财神棋牌app下载。该套件包括开发定制视频应用所需的硬件，软件和IP组件。详细 >>

AVNET

Xilinx Virtex UltraScale+ FPGA VCU1525 加速开发套件

Xilinx Virtex UltraScale+ FPGA VCU1525 加速开发套件是想要充分利用 Virtex? UltraScale+? FPGA 高级功能的数据中心应用开发人员的理想选择财神棋牌_财神棋牌app下载。这款 PCIe? 开发板可在云端访问，也可通过框架财神棋牌_财神棋牌app下载、库财神棋牌_财神棋牌app下载、驱动程序和开发工具进行本地访问，从而可通过 Xilinx SDAccel? 开发环境使用 OpenCL?、C、C++ 和 RTL 轻松进行应用编程。详细 >>

XILINX

Xilinx Virtex UltraScale+ FPGA VCU118 评估套件

Virtex? UltraScale+? FPGA VCU118 评估套件为评估前沿的 Virtex UltraScale+ FPGA 提供了完美的开发环境。Virtex UltraScale+ 器件在 FinFET 节点提供最高性能与集成功能，其中包括最高串行 I/O 和处理带宽，以及最高片上内存密度。详细 >>

XILINX

Xilinx Zynq UltraScale+MPSoC ZCU102 评估套件

ZCU102 评估套件可帮助设计人员快速启动面向汽车、工业财神棋牌_财神棋牌app下载、视频以及通信应用的设计财神棋牌_财神棋牌app下载。该套件具有基于 Xilinx 16nm FinFET+ 可编程逻辑架构的 Zynq UltraScale+? MPSoC 器件，提供一款四核 ARM? Cortex-A53、双核 Cortex-R5 实时处理器以及一款 Mali-400 MP2 图像处理单元。ZCU102 支持所有可实现各种应用开发的主要外设及接口财神棋牌_财神棋牌app下载。详细 >>

XILINX

Xilinx Zynq UltraScale+MPSoC ZCU106 评估套件

ZCU106 评估套件可帮助设计人员为视频会议财神棋牌_财神棋牌app下载、监控财神棋牌_财神棋牌app下载、高级驾驶员辅助系统 (ADAS) 以及流媒体及编码应用快速启动设计财神棋牌_财神棋牌app下载。（The ZCU106 Evaluation Kit enables designers to jumpstart designs for video conferencing, surveillance, Advanced Driver Assisted Systems (ADAS) and streaming and encoding applications.ZCU106评估套件可帮助设计人员快速启动视频会议，监控财神棋牌_财神棋牌app下载，高级驾驶员辅助系统（ADAS）以及流媒体和编码应用的设计。）此套件包含一个 Zynq? UltraScale+? MPSoC EV 器件,并支持所有可实现各种应用开发的主要外设及接口。随附提供的 ZU7EV 器件配备四核 ARM? Cortex?-A53 应用处理器、双核 Cortex-R5 实时处理器、Mali?-400 MP2 图形处理单元、支持 4KP60 的 H.264/H.265 视频编解码器和 16nm FinFET+ 可编程逻辑。详细 >>

XILINX

Xilinx Kintex UltraScale FPGA KCU1500 Acceleration Development Kit

Kintex? UltraScale? FPGA 加速开发套件是超大规模应用开发人员的极好起点。该套件基于可访问云端的 PCI 卡，支持各种框架、库财神棋牌_财神棋牌app下载、驱动器及开发工具，可通过 SDAccel 采用 OpenCL财神棋牌_财神棋牌app下载、C 或 C++ 轻松进行应用编程。该套件不仅可使用云端在该物理套件启动开发财神棋牌_财神棋牌app下载，并且还可以借助Xilinx和Xilinx合作伙伴的力量投入生产。详细 >>

XILINX

Xilinx Virtex UltraScale FPGA VCU108 评估套件

Virtex? UltraScale? FPGA VCU108 评估套件是评估 Virtex UltraScale 器件所提供前所未有高性能、高系统集成度以及高带宽的完美开发环境财神棋牌_财神棋牌app下载财神棋牌_财神棋牌app下载。该套件是需要海量数据流及数据包处理的系统原型设计的理想平台财神棋牌_财神棋牌app下载，可充分满足 400+ Gbps 系统、大规模仿真以及高性能计算等应用需求。详细 >>

XILINX

FPGA VCU110 开发套件

Virtex? UltraScale? FPGA VCU110 开发套件是评估 Virtex UltraScale 器件所提供前所未有高性能、高系统集成度以及高带宽的完美开发环境。套件为需要大量数据吞吐（如 400+ Gbps 系统和 28 Gbps 背板应用）的开发系统提供了理想平台。详细 >>

XILINX

Kintex? UltraScale? FPGA 加速开发套件是超大规模应用开发人员的极好起点。该套件基于可云端访问的生产就绪型 PCI 卡财神棋牌_财神棋牌app下载，支持各种框架、库财神棋牌_财神棋牌app下载财神棋牌_财神棋牌app下载、驱动器及开发工具，可通过 SDAccel 采用 OpenCL财神棋牌_财神棋牌app下载、C 或 C++ 轻松进行应用编程财神棋牌_财神棋牌app下载。在 Xilinx 的帮助下财神棋牌_财神棋牌app下载，您不仅可在云端启动开发，使用该物理套件启动开发，也可使用该物理套件在云端启动开发财神棋牌_财神棋牌app下载财神棋牌_财神棋牌app下载，而且财神棋牌_财神棋牌app下载，您还可以借助一个 Xilinx 生态系统合作伙伴的力量投入生产。详细 >>

XILINX

The DNVUF4A is a complete logic prototyping system that enables ASIC or IP designers a vehicle to prototype logic and memory designs for a fraction of the cost of existing solutions. The DNVUF4A is a stand-alone system and can be hosted by a 4-lane PCIe cable (GEN3), USB or Ethernet. A single DNVUF4A configured with four Virtex UltraScale, VU440s can emulate up to 116 million gates of logic as measured by a reasonable ASIC gate counting standard. An infinite number of DNVUF4Ascan be linked together extending this gate count number 1 billion or more seamlessly. The gate count estimate number does not include embedded memories and multipliers resident in the FPGA fabric. One hundred percent (100%) of the Virtex UltraScale FPGA resources are available to the user application. The DNVUF4A achieves high gate density and allows for fast target clock frequencies by utilizing FPGAs from Xilinx 详细 >>

The DiNi Group

DNPCIe_400G_VUP_HBM_LL

The DNPCIE_400G_VUP_HBM_LL is a PCIe-based FPGA board designed to minimize input to output processing latency on 10-Gbit, 40-Gbit, or 100GbE Ethernet packets. The primary application is for low-cost, low latency, high throughput trading without CPU intervention. Every possible variable that affects input to output latency has been analyzed and minimized. Raw 10/40/100 GbE Ethernet packets can be analyzed and acted upon without a MAC, interrupts, or an operating system adding delay to the process. This configurable hardware computing platform has the ability to achieve the theoretical minimum Ethernet packet processing latency. 详细 >>

The DiNi Group

PYNQ-Z2开发板是一款支持PYNQ开源框架的开发平台财神棋牌_财神棋牌app下载。PYNQ开源框架可以使嵌入式编程用户在无需设计可编程逻辑电路的情况下充分发挥Xilinx Zynq All Programmable SoC（APSoC）的功能财神棋牌_财神棋牌app下载。PYNQ-Z2除支持传统ZYNQ开发方式外，还可支持Python进行APSoC编程，并且代码可直接在PYNQ-Z2上进行开发和调试财神棋牌_财神棋牌app下载?？杀喑搪呒缏芬杂布獾男问降既氩⑶铱梢酝ü鼳PI编程，这种方式基本上与软件库的导入和编程方式相同。详细 >>

XILINX

EXOSTIV?是一款面向FPGA开发的创新调试解决方案。他提供了远超JTAG调试工具的采样数据存储深度，却只使用远比逻辑分析仪少的IO资源财神棋牌_财神棋牌app下载。它对FPGA逻辑资源使用影响很小，并且能够进行TB级波形数据的分析，可大大缩短FPGA开发的调试周期。EXOSTIV支持全系列Xilinx All Programmable器件，支持Intel Stratix 10、Arria 10财神棋牌_财神棋牌app下载、Cyclone 10系列器件的调试财神棋牌_财神棋牌app下载。详细 >>

Exostiv

The TUL FPGA PCIe Accelerator Card uses a Xilinx Field Programmable Gate Array (FPGA) as a programmable accelerator for data center applications. The card is configured with Kintex Ultra Scale KU115 which supports 40Gb Ethernet operation over 2 QSFP28 connectors. 详细 >>

TUL

DNVUF2_HPC_PCIe_Cluster

The DNVUF2_HPC_PCIE_Cluster is a complete, 5U rack mount FPGA acceleration cluster. The standard configuration contains the following: Trenton System HEP8225 Dual Xeon Processor Card 7 - DNVUF2_HPC_PCIE cards with 2 VU095-2 FPGAs per card. 1.5 TB SATA II Hard Drive 详细 >>

The DiNi Group

The DNBC1_MICTOR is an expansion card that adds a single Mictor connector to an FPGA board. This expansion card is targeted for use on Xilinx Virtex-Ultrascale series products from DINI Group. 详细 >>

The DiNi Group

The DiNi Group

The DiNi Group

DNSOM200_MICTOR

The DiNi Group

DNSOM200_INTERCON

The DiNi Group

The DNSODM200_FLASH is a SODIMM module that can be installed in a 200-pin DDR2 SODIMM socket. This module contains two Spansion? Flash chips (S71WS128NB0BFWAN0-LF) in a 8M x 32 configuration for a total of 32 megabytes of FLASH memory. SSRAM (2M x 32) is also provided on the same address/data pins via a separate chip select. 详细 >>

The DiNi Group

DNSODM_DDR3 is a SODIMM module compatible with the SODIMM sockets in any DN9000K10, DN9002K10PCI, DN9000K10PCIE8T and newer FPGA boards. It provides 512MB of memory using the DDR3 memory interface. The board operates at 1.5V, and as such, only FPGA boards supporting this low voltage can operate this module. 详细 >>

The DiNi Group

The DNSODM200_DDR is a DDR2-to-PC2700 adapter card compatible with Dini Group products with DDR2 memory sockets. It allows a standard PC2700 SODIMM module (up to 512MB) to connect to the SODIMM slot of your Dini Group Emulation board. Each module is tested at 140Mhz. DDR1 controller is not provided. 详细 >>

The DiNi Group

DNSOM200_QUADMIC

The DNSODM200_MICTOR is a SODIMM module that can be installed in a 200-pin DDR2 SODIMM socket. This module contains two Mictor connectors and three, 12-pin IDC-type headers. Logic analyzers from Tektronix and Agilent can be directly connected to FPGA pins enabling direct high-speed observation. Three, IDC-type 12-pin headers allow for external cabling to peripherals, oscilloscopes, or function generators. Two of these headers are routed as LVDS differential with 5 pairs. The third header has 5 single-ended, +1.8V TTL signals. Eight LEDs add additional visual feedback. 详细 >>

The DiNi Group

DNSOM200_RLDRAM

The DNSODM200_RLDRAM is a SODIMM module that can be installed in a 200-pin DDR2 SODIMM socket. This module contains two RLDRAMs chips in an 8M x 64-bit configuration for a total of 64 megabytes. 详细 >>

The DiNi Group

The DNSODM200_SDR is a DDR2-to-PC100 adapter card compatible with Dini Group products with DDR2 sockets. It allows a standard PC133 SODIMM module (up to 256MB of Single-Data rate memory) to connect to the DDR2 slot of your Dini Group Emulation board. Compatible with: DN9000K10-series 详细 >>

The DiNi Group

The DNSODM200_SE is a SODIMM module, compatible with all 200-pin DIMM slots on Dini Group products. The module contains one 256Mb flash and two 32Mb module SDRAM chips. Also, an EPROM socket can hold a serial prom with densities up to 512Kb. 详细 >>

The DiNi Group

The DNSODM200_SSRAM is a SODIMM module that can be installed in a 200-pin DDR2 SODIMM socket. This module contains two SSRAMs chips in a 2M x 64 configuration for a total of 16 megabytes (GS8640V32) or 1M x 64 for a total of 8 megabytes (GS8320V32). 详细 >>

The DiNi Group

DNSOM200_SSRAMx4

The DNSODM200_SSRAMx4 is a SODIMM module that can be installed in a 200-pin DDR2 SODIMM socket. This module contains four SSRAMs chips in a 8M x 18 configuration (GS8128418GB-200V) or eight chips in a 8M x 18 (GS8128418GB-200V). Stuffed with the GSI Technology GS8128418GB-200V, the DNSODM200_SSRAMx4 is configured in 详细 >>

The DiNi Group

The DNSODM200_USB is a SODIMM module that can be installed in a 200-pin DDR2 SODIMM socket on any FPGA-based ASIC emulation product from The Dini Group. This module adds USB2.0 physical layer functionality, allowing easy and cost effective prototyping of USB IP. This module also contains an SDIO interface, a stereo CODEC, and an SPI serial EEPROM. Eight green LEDs can create enough illumination to peel paint from your lab walls or provide valuable visual feedback to your debug process. 详细 >>

The DiNi Group

DNSOM_RLDRAM_II SIO

The DNSODM200_RLDRAM-II_SIO is a SODIMM module that can be installed in a 200-pin DDR2 SODIMM socket. This module contains two RLDRAM II chips in a 32M x 36-bit configuration for a total of 144 megabytes. 详细 >>

The DiNi Group

本产品为可编程无线通信开发平台，可用于开发各类无线通信系统。主要芯片由Xilinx公司的Zynq系列FPGA与Analog公司的AD9361组成。Zynq内部由ARM与FPGA构成财神棋牌_财神棋牌app下载，可用于开发各类应用，实现各类通信协议与基带标准。AD9361是一款面向3G和4G基站应用的高性能、高集成度的射频收发器，用于实现基带信号与射频信号之间的转换。详细 >>

依元素科技

现代宽带无线通信工程项目开发板

该开发板含有信息与通信处理单元（包含互联网路由器、无线通信网络控制器、通信传输与信号处理电路）和宽带射频收发信机，支持通信工程学科的综合实验。收发信机主要完成数字/模拟转换财神棋牌_财神棋牌app下载、正交解制/解调、信号放大与增益自动控制、接收低噪放大与发送可编程功率输出。该开发板主要用于无线通信的实验教学财神棋牌_财神棋牌app下载，还可以用来开设嵌入式技术、移动互联技术、物联网技术等相关课程。实验项目以二次开发和创新性实验为主财神棋牌_财神棋牌app下载财神棋牌_财神棋牌app下载，学生还可以开展课外创新实践。采用核心板加底板架构模式财神棋牌_财神棋牌app下载，提供了稳定的CPU最小系统?？椴粕衿迮芲财神棋牌app下载财神棋牌_财神棋牌app下载，方便二次开发，可应用在不同的创新实验或实践中。详细 >>

依元素科技

SOUP W16系列产品是一种高性能、可扩展的软件定义无线电（SDR）的平台财神棋牌_财神棋牌app下载，可用来研究财神棋牌_财神棋牌app下载、设计和部署下一代无线通信系统和各类无线电应用。详细 >>

依元素科技

Zynq UltraScale+ RFSoC ZCU111 评估套件

Zynq UltraScale+ RFSoC ZCU111 评估套件有助于设计人员为无线财神棋牌_财神棋牌app下载、有线接入、预警 (EW)／雷达以及其它高性能 RF 应用快速启动 RF-Class 模拟设计。该套件采用 Zynq Ultrascale+ RFSoC，支持 8x 4GSPS 12 位 ADC、8x 6.5GSPS 14 位 DAC 和 8 个软决定前向纠错 (SD-FEC)财神棋牌_财神棋牌app下载。该套件配有 ARM Cortex A53 和 ARM Cortex-R5 子系统财神棋牌_财神棋牌app下载、UltraScale+ 可编程逻辑以及 Zynq UltraScale+ 器件中的最高信号处理带宽财神棋牌_财神棋牌app下载，可提供一个快速财神棋牌_财神棋牌app下载、全面的 RF 模数信号链原型设计平台。详细 >>

XILINX

HTG-ZRF8内置一个Xilinx ZYNQ UltraScale+ RFSoC ZU25DR，ZU27DR或ZU28DR，可以访问大型FPGA，多个ADC/DAC端口，可扩展I/O端口和DDR4内存，适用于各种不同的可编程应用。 HTG-ZRF8由8个12位ADC（4GSPS）和8个14位DAC（6.4GSPS）端口提供支持财神棋牌_财神棋牌app下载。ADC和DAC端口通过高性能且微型Rf连接器支持。 HTG-ZRF8架构通过一个符合Vita 57.4标准的高引脚数FPGA夹层卡（FMC +）和一个符合Vita57.1标准的高引脚数FPGA夹层卡（FMC）端口财神棋牌_财神棋牌app下载，可实现简单通用的功能扩展。 HTG-ZRF8由一个72位ECC DDR4 SODIMM插槽支持，可访问高达16 GB的SDRAM内存。处理器方面最高支持4GB DDR4内存（目前配备2GB）。该板还受HiTech Global 4GB混合存储器立方体（HMC）FMC +?财神棋牌_财神棋牌app下载？榈闹С?，用于高性能串行存储器。 HTG-ZRF8可用于PCI Express和独立模式财神棋牌_财神棋牌app下载，并通过其6针Molex PCIe连接器供电财神棋牌_财神棋牌app下载。详细 >>

HitechGlobal

The DNSEAM_MISC is an expansion card that adds four separate USB3.0 channels to any GTX expansion slot. In addition, two channels of GTX are connected to SMAs and two GTX channels are connected to SATA III. 详细 >>

The DiNi Group

The DNSEAM_PCIe breaks out a DNSEAM connector to a pair of 4-lane iPASS PCI Express Cable connections. This allows implementation of PCI Express x1, x4, or x8 connections with your Dini product, either for PCI Express core prototyping or simply establishing high-speed connectivity to a host system. The card is equipped with a pair of ICS874003 jitter attenuators to minimize the jitter on the PCI Express REFCLK going to the host board. Recommended accessories: DNPCIe_CBL, DNPCIe_CBL_GEN2. 详细 >>

The DiNi Group

DNSEAM_SFP is a daughter card to add low-latency network connectivity to Dini Group prototyping boards. SFP sockets are compatible with a wide variety of physical media including 10/100/1G base-T, optical gigabit Ethernet, Fibre channel, direct copper connection, and others. The eight SFP sockets can operate as independent network endpoints, or can be ganged into a single eight-channel connection. 详细 >>

The DiNi Group

The DNSEAM_ SFPPLUS is a daughter card for use on any FPGA-based ASIC Prototyping Platform from the Dini Group with a DNSEAM_NS (SEARAY) GTX Expansion header. It is a full-width DNSEAM_NS daughter card that provides up to eight SFP+ portst. The primary applications would be 10 Gbe Ethernet. 详细 >>

The DiNi Group

SMA Connectors on a DNSEAM Daughter Card. 详细 >>

The DiNi Group

The DNSEAM_CX4 breaks out a DNSEAM connector (like on the DNV6F6 and DN2076K10) to a pair of 4-lane Infiniband-style connectors. This allows implementation of X4 infiniband and 10GBASE-CX4 on select Dini Group products.This card can (optionally) be equipped with Si534 or Si598 DSPLLs to generate virtually any clock frequency for the GTX REFCLK inputs. 详细 >>

The DiNi Group

DINAR1_HDMI_ETH_USB

The DINAR1_HDMI_ETH_USB is a daughter card that adds HDMI receive and transmit interfaces to the DINI Group line of FPGA-based ASIC prototyping products. This card can be used standalone. Standalone operation requires loopback board on the DINAR1 connector (provided) and a separate ATX power supply. 详细 >>

The DiNi Group

The DINAR1_FMC-LPC is passive transposer card that hosts a low pin count FMC card on a DINAR1 expansion connector. The DINAR1_FMC-LPC can be used on the following DINI Group Xilinx Virtex-7 products: DNV7F4A, DNV7F2A,DNV7F2B and DNV7F1A. 详细 >>

The DiNi Group

The DINAR1_FLASH is an expansion card that adds FLASH memory to a DINAR1 expansion slot. 详细 >>

The DiNi Group

DINAR1_DDR3_FLASH

The DINAR1_DDR3_FLASH is an expansion card that adds DDR3 memory (32-bits) and Flash to a DINAR1 expansion slot. 详细 >>

The DiNi Group

DINAR1_INTERCON

The DiNi Group

DINAR1_K7_FMC-HPC

The DINAR1_K7_FMC-HPC is an active transposer card that hosts a high pin count FPGA Mezzanine Card (FMC) on a DINAR1 expansion connector. This card is intended to bridge HPC FMC cards to a DINAR1 connector. The DINAR1_K7_FMC-HPC can be used on the following DINI Group Xilinx Virtex-7 products: DNV7F4A, DNV7F2A and DNV7F1A. 详细 >>

The DiNi Group

The DINAR1_OBS is an expansion card that adds a variety of standard interfaces to any DINAR1 expansion connector. This expansion card is targeted for use on Xilinx Virtex-7 series products from DINI Group. The DINAR1_OBS has two Mictor connectors, two 40-pin IDC connectors, and a 4-position DIP switch. In addition, two 8-pin single-row IDC connectors are translated, allowing input/output up to +3.3V. Eight LEDs can be controlled via FPGA pins on the host card. Linear regulators provide the reference voltage for the 3 FPGA banks on the hosting card. 详细 >>

The DiNi Group

The DINAR1_SOC is an expansion card that adds a variety of standard system on a chip (SOC) peripherals and interfaces to any DINAR1 expansion connector. 详细 >>

The DiNi Group

DINAR1_SODM204 is a daughter card that adds DDR3 memory to any DINAR1 expansion connector. The card contains a 204-pin SODIMM, enabling the use of low-cost, off-the-shelf DDR3 modules. This daughter card along with any of our Virtex-7 based FPGA boards is characterized to run at TBD and possibly faster with faster speed grade V7 FPGAs. Consult the factory for the latest info. 详细 >>

The DiNi Group

DNSOM204_MICTOR_IO

The DNSODM204_MICTOR_IO is a SODIMM module that can be installed in a 204-pin DDR3 SODIMM socket. This module contains a single Mictor connector, two +5V tolerant 18-pin IDC connectors, and 16 DIP switches. Logic analyzers from Tektronix and Agilent can be directly connected to FPGA pins via the Mictor connector, enabling direct high-speed observation. Two LEDs add additional visual feedback. Off-board I2C devices can be controlled via a cable to the +3.3V tolerant I2C connector. 详细 >>

The DiNi Group

DNSOM204_QDRII+

The DNSODM204_QDR-II+ is a SODIMM module that can be installed in a 204-pin DDR3 SODIMM socket. This module contains two QDR-II+ SSRAM 详细 >>

The DiNi Group

DNSOM204_QUADMIC

The DNSODM204_QUADMIC is a SODIMM module that can be installed in a 204-pin DDR3 SODIMM socket. This module contains four Mictor connectors. Logic analyzers from Tektronix and Agilent can be directly connected to FPGA pins enabling direct high-speed debug of FPGA signals. 详细 >>

The DiNi Group

The DNSODM204_SE is a SODIMM module that can be installed in a 204-pin DDR3 SODIMM socket. This module contains two Micron Mobile SDR SDRAMs organized as 16M x 32. We use the 54-ball VFBGA package. We use Micron as our main mobile SDRAM memory supplier. 详细 >>

The DiNi Group

DNSOM204_SSRAM1_8V

The DNSODM204_SRAM1_8V is a SODIMM module that can be installed in a 1.8V-compatible 204-pin DDR3 SODIMM socket. This module contains 8 separate SSRAM memories. There are 2 ranks of 4 chips. Each memory is the GS81284Z18 in the 1.8V version. The SSRAM is 8M x 18, so the module configuration is 16B x 72-bits, totaling 144MB. The JTAG chain is connected. 详细 >>

The DiNi Group

The DNSODM204_USB is a SODIMM module that can be installed in a 204-pin DDR3 SODIMM socket on FPGA-based ASIC emulation products from Dini Group. This module adds USB2.0 physical layer functionality, allowing easy and cost effective prototyping of USB IP. This module also contains a 48-pin TSOP socket for a NAND Flash memory, a 128Mbit serial flash memory, and two 40-pin IDC headers for off-board I/O. Ten (10!) green LEDs can create enough illumination to peel paint from your lab walls or provide valuable visual feedback to your debug process. 详细 >>

The DiNi Group

DNSOM204_DDR2_FAST

The DNSODM204_DDR2_FAST is a SODIMM module that can be installed in a 204-pin DDR3 SODIMM socket. This module contains 8 separate DDR2 memories. Each memory is 64Mb x 8. They are arranged in a 64M x 64 configuration for a total of 512 MB. Six LEDs add visual feedback under FPGA I/O control. 详细 >>

The DiNi Group

DNSOM204_DDR2_2GB

The DNSODM204_DDR2_2GB is a SODIMM module that can be installed in a 204-pin DDR3 SODIMM socket. This module contains 8 separate Micron 256M x 8 DDR2 memories. They are arranged in a 256M x 64 configuration for a total of 2 GB. 详细 >>

The DiNi Group

?The DNTBC3_FMC-HPC is an adapter card that adds an FMC-HPC connector to an FPGA board. This expansion card is targeted for use on Xilinx Virtex-Ultrascale series products from DINI Group. 详细 >>

The DiNi Group

The DINAR1_CBL is a cable that connects two DINAR1 expansion connectors. The intent is to seamlessly connect two FPGA cards together. The cable is coax and is one-to-one. 详细 >>

The DiNi Group

TCP Offload Engine IoT (TOE_IoT) is FPGA-based IP that receives and transmits Ethernet/IP/TCP packets on Ethernet networks. TOE_IoT delivers payload data, in order, to the user.s application with: 详细 >>

The DiNi Group

TCP Offload 128(TOE128) is a FPGA-based IP that receives and transmits Ethernet/IP/TCP packets on Ethernet networks across 128 simultaneous sessions. TOE128 delivers payload data, in order, to the user’s application with: 详细 >>

The DiNi Group

Pin Multiplexing

The Dini Group LVDS IO Pin Multiplexing design (DNLVDS_PINMUX) is intended to ease the strain of prototyping an ASIC design that spans multiple FPGAs by providing a low-latency IO pin multiplexing design. A latency of one clock cycle is achievable end-to-end, so the multiplexing essentially becomes invisible to the ASIC design. IO rates are maximized to allow for the highest internal frequency possible. Eye detection training and real-time eye monitoring are implemented inside the receiver module. 详细 >>

The DiNi Group

PCIe PIPE Slowdown Core

The process of prototyping PCIe systems with FPGAs is easier if the frequency is reduced to a number comfortably within an FPGAs capability. This is troublesome in PCI Express systems since the clocks are generated using high performance PLLs and cannot be readily throttled. So PIPE interfaces in FPGA prototypes are required to run at 125MHz/250MHz for GEN1 PCIe and at 250MHz/500MHz for GEN2 and these are too fast. The Dini Group PCIe PIPE Slowdown Core enables IP interfacing to the standard Intel PIPE at a much slower frequency. 详细 >>

The DiNi Group

HardwareShark?is an FPGA-based front end to Wireshark and adds a high-performance hardware sniffing buffer to 10GbE, 40GbE, and 100GbE, assuring no dropped packets with a large depth. Since HardwareShark? runs independently of the operating system it is immune to crashes.HardwareShark? automatically interleaves RX and TX packets according to when the first byte is received. The resulting data buffer will be saved as a single interleaved file that can be later split into two non-interleaved files based on destination and source MAC addresses. The output is stored in the standard .erf (extensible record format) file format and can be viewed or analyzed by the Wireshark GUI or any other compatible tool. 详细 >>

The DiNi Group

The debug of FPGA-based designs is a difficult and time intensive task. Several techniques are available to aid in debug. One technique is to route internal FPGA nodes to external I/O pins and then observe those nodes on a logic analyzer or an oscilloscope. Another is to embed a logic analyzer in the FPGA. A problem with either approach is that knowledge of which signals to observe is required prior to place/route. Some tools, Certus? from Mentor, being an example, have tricks to partially work around this issue. But by and large, if you want observability, you need to know ahead of time what signals you will want to observe. ? 详细 >>

The DiNi Group

Mango

本平台是基于ZYNQ的数字信号处理平台?；赯YNQ的信号处理平台配备的 FPGA (XC7Z020CLG484-1)具有ARM-A9双核处理器以及丰富PL逻辑资源，结合 SoC 设计的概念能实现较复杂的数字逻辑设计和复杂的控制逻辑设计。该平台拥有丰富的外设，包括高速的ADC/DAC接口（SMA）财神棋牌_财神棋牌app下载、高清图像输入/输出接口、音频输出接口，以及灵活的通用扩展接口，可以满足新工科、新业态的现代数字信号处理课程。详细 >>

依元素科技

DNPCIE_10G_7K_LL

The DNPCIe_10G_K7_LL is a PCIe-based FPGA board designed to minimize input to output processing latency on 10Gb Ethernet packets. The primary application is for ultra low latency, high throughput trading without CPU intervention. Every possible variable that affects input to output latency has been analyzed and minimized. Raw 10 GbE Ethernet packets can be analyzed and acted upon without interrupts or an operating system adding delay to the process. This configurable hardware computing platform has the ability to achieve the theoretical minimum Ethernet packet processing latency. 详细 >>

The DiNi Group

The DNVUF2A is a complete logic prototyping system that enables ASIC or IP designers a vehicle to prototype logic and memory designs for a fraction of the cost of existing solutions. The DNVUF2A is a stand-alone system and can be hosted by a 4-lane PCIe cable (GEN3), USB or Ethernet. A single DNVUF2A configured with two Virtex UltraScale, VU440s can emulate up to 58 million gates of logic as measured by a reasonable ASIC gate counting standard. An infinite number of DNVUF2Ascan be linked together extending this gate count number 1 billion or more seamlessly. The gate count estimate number does not include embedded memories and multipliers resident in the FPGA fabric. One hundred percent (100%) of the Virtex UltraScale FPGA resources are available to the user application. The DNVUF2A achieves high gate density and allows for fast target clock frequencies by utilizing FPGAs from Xilinx 详细 >>

The DiNi Group

DNVUF2_HPC_PCIe

This product is intended to be used for various FPGA-based algorithmic acceleration tasks that require access to large amounts of local memory. The DNVUF2_HPC_PCIe hosts two Xilinx FPGAs from the UltraScale and UltraScale+ families. Each FPGAs has multiple banks of high performance DDR4 memory. Data movement to/from the FPGAs is accomplished via an 8-lane, GEN3 PCIe interface. Each of the two FPGAs (A and B in the block diagram) has six separate 1G x 16 DDR4 (16 Gb) memories and a bank of 1G x 64 DDR4. 详细 >>

The DiNi Group

The DNVUF1A is a complete logic prototyping system that enables ASIC or IP designers a vehicle to prototype logic and memory designs for a fraction of the cost of existing solutions. The DNVUF1A is a stand-alone system and can be hosted by a 4-lane PCIe cable (GEN3), USB or Ethernet. A single DNVUF1A is configured with a single Virtex UltraScale XCVU440 and can emulate up to 29 million gates of logic as measured by a reasonable ASIC gate counting standard. An infinite number of DNVUF1As can be linked together extending this gate count number 1 billion or more seamlessly. The gate count estimate number does not include embedded memories and multipliers resident in the FPGA fabric. One hundred percent (100%) of the Virtex UltraScale FPGA resources is available to the user application. The DNVUF1A achieves high gate density and allows for fast target clock frequencies by utilizing FPGAs from Xilinx 详细 >>

The DiNi Group

DNPCIe_400G_VU_LL

The DNPCIE_400G_VU_LL is a PCIe-based FPGA board designed to minimize input to output processing latency on 10-Gbit, 40-Gbit, or 100GbE Ethernet packets. The primary application is for low-cost, low latency, high throughput trading without CPU intervention. Every possible variable that affects input to output latency has been analyzed and minimized. Raw 10/40/100 GbE Ethernet packets can be analyzed and acted upon without a MAC, interrupts, or an operating system adding delay to the process. This configurable hardware computing platform has the ability to achieve the theoretical minimum Ethernet packet processing latency. 详细 >>

The DiNi Group

The DNV7F4A is a complete logic prototyping system that enables ASIC or IP designers a vehicle to prototype logic and memory designs for a fraction of the cost of existing solutions. The DNV7F4A is a stand-alone system and can be hosted by 4-lane PCIe cable (GEN2), USB or Ethernet. A single DNV7F4A configured with four Virtex-7, 7V2000Ts can emulate up to 56 million gates of logic as measured by a reasonable ASIC gate counting standard. Two DNV7F4A can be linked together, doubling this gate count to 112 million seamlessly. More DNV7F4As can be linked together if the design grows larger. The gate count estimate number does not include embedded memories and multipliers resident in the FPGA fabric. One hundred percent (100%) of the Virtex-7 FPGA resources are available to the user application. The DNV7F4A achieves high gate density and allows for fast target clock frequencies by utilizing FPGAs from Xilinx 详细 >>

The DiNi Group

The DNV7F2B is a complete logic prototyping system that enables ASIC or IP designers a vehicle to prototype logic and memory designs for a fraction of the cost of existing solutions. The DNV7F2B is a stand-alone system and can be hosted by 4-lane PCIe cable (GEN1), USB or Ethernet. A single DNV7F2B configured with two Virtex-7, 7V2000Ts can emulate up to 28 million gates of logic as measured by a reasonable ASIC gate counting standard. Two DNV7F2Bs can be linked together, doubling this gate count to 56 million seamlessly. More DNV7F2Bs can be linked together if the design grows larger. The gate count estimate number does not include embedded memories and multipliers resident in the FPGA fabric. One hundred percent (100%) of the Virtex-7 FPGA resources are available to the user application. The DNV7F2B achieves high gate density and allows for fast target clock frequencies by utilizing FPGAs from Xilinx 详细 >>

The DiNi Group

The DNV7F2A is a complete logic prototyping system that enables ASIC or IP designers a vehicle to prototype logic and memory designs for a fraction of the cost of existing solutions. The DNV7F2A is a stand-alone system and can be hosted by 4-lane PCIe cable (GEN1/2), USB or Ethernet. A single DNV7F2A configured with two Virtex-7, 7V2000T can emulate up to 28 million gates of logic as measured by a reasonable ASIC gate counting standard. Two DNV7F2As can be linked together, doubling this gate count to 56 million seamlessly. More DNV7F2As can be linked together if the design grows larger. The gate count estimate number does not include embedded memories and multipliers resident in the FPGA fabric. One hundred percent (100%) of the Virtex-7 FPGA resources are available to the user application. The DNV7F2A achieves high gate density and allows for fast target clock frequencies by utilizing FPGAs from Xilinx 详细 >>

The DiNi Group

DNPCIe_40G_KU_LL_2QSFP

The DNPCIE_40G_KU_LL_2QSFP is a PCIe-based FPGA board designed to minimize input to output processing latency on 10-Gbit or 40-Gbit Ethernet packets. The primary application is for low-cost, low latency, high throughput trading without CPU intervention. Every possible variable that affects input to output latency has been analyzed and minimized. Raw 10 or 40 GbE Ethernet packets can be analyzed and acted upon without a MAC, interrupts, or an operating system adding delay to the process. This configurable hardware computing platform has the ability to achieve the theoretical minimum Ethernet packet processing latency. 详细 >>

The DiNi Group

DNPCIE_10G_7K_LL_QSFP

The DNPCIe_10G_K7_LL is a PCIe-based FPGA board designed to minimize input to output processing latency on 10Gb Ethernet packets. The primary application is for ultra low latency, high throughput trading without CPU intervention. Every possible variable that affects input to output latency has been analyzed and minimized. Raw 10 GbE Ethernet packets can be analyzed and acted upon without interrupts or an operating system adding delay to the process. This configurable hardware computing platform has the ability to achieve the theoretical minimum Ethernet packet processing latency. 详细 >>

The DiNi Group

The DNK7_F5PCIe is a Xilinx Kintex-7 based FPGA board optimized for algorithmic acceleration applications requiring FPGAs with high-performance local memory. Data movement to/from the FPGA grid is accomplished via a fixed 4-lane, GEN1/GEN2 PCIe bridge. Each Kintex-7 FPGA (FPGAs 1-4 in the block diagram) has five separate 256M x 16 DDR3 (4 Gb) memories. The Dataflow Manager FPGA (FPGA 0 in the block diagram) has six 256M x 16 DDR3 memories. 详细 >>

The DiNi Group

DNPCIe_40G_KU_LL

The DNPCIE_40G_KU_LL is a PCIe-based FPGA board designed to minimize input to output processing latency on 10-Gbit or 40-Gbit Ethernet packets. The primary application is for low-cost, low latency, high throughput trading without CPU intervention. Every possible variable that affects input to output latency has been analyzed and minimized. Raw 10 or 40 GbE Ethernet packets can be analyzed and acted upon without a MAC, interrupts, or an operating system adding delay to the process. This configurable hardware computing platform has the ability to achieve the theoretical minimum Ethernet packet processing latency. 详细 >>

The DiNi Group

DNK7_F5_8_Cluster

TheDNK7_F5_8_Clusteris a complete, 5U rack mount FPGA acceleration cluster. The standard configuration contains the following Trenton TSB7053 Xeon processor card - other options available 8 DNK7_F5PCIe Kintex 7 FPGA cards with 5 7K410T-1 FPGAs per card. 详细 >>

The DiNi Group

DINR1_HDMI_ETH_USB

The DINAR1_HDMI_ETH_USB is a daughter card that adds HDMI receive and transmit interfaces to the DINI Group line of FPGA-based ASIC prototyping products. This card can be used standalone. Standalone operation requires loopback board on the DINAR1 connector (provided) and a separate ATX power supply. 详细 >>

The DiNi Group

DINAR1_K7_FMC-HPC

The DINAR1_K7_FMC-HPC is an active transposer card that hosts a high pin count FPGA Mezzanine Card (FMC) on a DINAR1 expansion connector. This card is intended to bridge HPC FMC cards to a DINAR1 connector. The DINAR1_K7_FMC-HPC can be used on the following DINI Group Xilinx Virtex-7 products: DNV7F4A, DNV7F2A and DNV7F1A. As far as compatibility, FMC is a troublesome standard, so we will need to look at the FMC card you intend to use on a case by case basis. Contact us at the factory for help. 详细 >>

The DiNi Group

Expandable Hybrid Memory Cube (HMC) FMC+ Module (Vita57.4)

This Vita57.4 compliant FMC+ module is supported by 4GB of Hybrid Memory Cube (HMC) components for applications requiring high-speed and high-bandwidth serial memory. The module can be used in daisy chain fashion for expanding the memory density beyond 4GB. The Female FMC+ connector can host HiTech Global 详细 >>

HitechGlobal

Xilinx Zynq? UltraScale+? FMC PlatformPlatform

Supported by Xilinx Zynq UltraScale+ ZU6EG, 9EG, or 15EG FPGA, multiple expansion ports and its unique architecture, the HTG-Z999 can be used as daughter card adding processing capability and/or FPGA gate density to Vita57.1 or 57.4 compliant FPGA carrier boards or as standalone host module. 详细 >>

HitechGlobal

JD8714具有4096×2400超高分辨率的反射式LCoS微型显示器，是一款空间光调制器?；爻叽缥?.74μm，视频输入帧率为4K2K@30Hz，采用HDMI 1.4接口，视频输出帧率30Hz。JD8714空间光调制器可应用于诸多光学应用，诸如全息成像、波长选择开关财神棋牌_财神棋牌app下载、光数据存储和自适应光学组件等。详细 >>

和蓮光電(Jasper Display Corp.)

JD7554具有1920x1080超高分辨率的反射式LCoS微型显示器财神棋牌_财神棋牌app下载，是一款空间光调制器（SLM）实验设备财神棋牌_财神棋牌app下载〔粕衿迮芲财神棋牌app下载；爻叽缥?.4μm，视频输入帧率为2K*1K@60Hz财神棋牌_财神棋牌app下载，采用HDMI 1.4接口。JD7554可以帮助开发各种应用，包括DOE，HOE，激光加工财神棋牌_财神棋牌app下载财神棋牌_财神棋牌app下载，全息摄影，WSS和数据存储（HDS）等。详细 >>

和蓮光電(Jasper Display Corp.)

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关于我们

依元素科技E-Elements成立于2004年, 为Xilinx/ARM大学计划合作伙伴，自2007起在中国协同Xilinx 大学计划为两岸三地高校建设Xilinx联合实验室、FPGA 学生俱乐部财神棋牌_财神棋牌app下载，举办校园竞赛、师资培训、为教学与科研工作提供技术支持财神棋牌_财神棋牌app下载财神棋牌_财神棋牌app下载、学生创新实践等校企合作工作财神棋牌_财神棋牌app下载。

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